74ls107 Dip IC


47 in stock.


The 74LS107 is a JK Flip-Flop with individual J, K, Direct Clear, and Clock Pulse inputs. Output changes are initiated by the HIGH-to-LOW transition of the clock. … The 74LS107 IC has a wide range of working voltage, a wide range of working conditions, and directly interfaces with CMOS, NMOS, and TTL.

74LS107 Features & Specifications

  • Technology Family: LS
  • Dual JK Flip Flop Package IC
  • -ve edge triggered
  • VCC (Min): 4.75V
  • VCC (Max): 5.25
  • Bits (#): 2
  • Operating Voltage (Nom): 5V
  • Frequency at normal voltage (Max): 35MHz
  • Propagation delay (Max): 20ns
  • IOL (Max): 8mA
  • IOH (Max):-0.4mA
  • Rating: Catalog
  • Available in 14-pin PDIP, GDIP, PDSO packages


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